\XtoCVerification{DLimit FiP16 CPU PIC32MX170F256}
\begin{tabular}{l l}
\textbf{Date of Test} & 2026-06-19 \\
\textbf{Target controller} & PIC32MX170F256 \\
\end{tabular}
\vspace{1ex}
\XtoCTestCase{Inport test}{1}
Inport test for Control block DLimit.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 201 \\ \hline
\textbf{CPU cycles} & 37 & 37 & 37 & 93 & ... & 88 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Inputs} \\ \hline
\textbf{In (DSP)} & 0 & 0 & 0 & 0 & ... & 0 \\ \hline
\textbf{D0 (DSP)} & 655 & 655 & 655 & 655 & ... & 655 \\ \hline
\textbf{max (DSP)} & 26214 & 26214 & 26214 & 26214 & ... & 26214 \\ \hline
\textbf{min (DSP)} & 4915 & 4915 & 4915 & 4915 & ... & 4915 \\ \hline
\textbf{Enable (DSP)} & 0 & 0 & 0 & 1 & ... & 1 \\ \hline
\textbf{In} & 0 & 0 & 0 & 0 & ... & 0 \\ \hline
\textbf{D0} & 0.02 & 0.02 & 0.02 & 0.02 & ... & 0.02 \\ \hline
\textbf{max} & 0.8 & 0.8 & 0.8 & 0.8 & ... & 0.8 \\ \hline
\textbf{min} & 0.15 & 0.15 & 0.15 & 0.15 & ... & 0.15 \\ \hline
\textbf{Enable} & 0 & 0 & 0 & 1 & ... & 1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Parameters} \\ \hline
\textbf{Kd} & \SetCell[c=6]{c}0.003 \\ \hline
\textbf{fc} & \SetCell[c=6]{c}200 \\ \hline
\textbf{ts\_fact} & \SetCell[c=6]{c}1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Outputs} \\ \hline
\textbf{Out} & 0 & 0 & 0 & 0.15 & ... & 0.15 \\ \hline
\textbf{Exp. Out} & 0 & 0 & 0 & 0.15 & ... & 0.15 \\ \hline
\textbf{Out (DSP)} & 0 & 0 & 0 & 4915 & ... & 4915 \\ \hline
\textbf{Exp. Out (DSP)} & 0 & 0 & 0 & 4915 & ... & 4915 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance Out & $\pm$3,0518e-04 ($\pm$10 LSB) \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 37 \\ \hline
Max CPU cycles & 93 \\ \hline
Avg CPU cycles & 87 \\ \hline
\end{XtoCtabular}
\XtoCTestCase{Conversion test}{1}
Conversion test for Control block DLimit.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 37 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Mask parameters} \\ \hline
\textbf{Kd} & -10 & -9.444 & -8.889 & -8.333 & ... & 10 \\ \hline
\textbf{fc} & 0 & 13.889 & 27.778 & 41.667 & ... & 500 \\ \hline
\textbf{ts\_fact} & 1 & 1 & 1 & 1 & ... & 1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Controller parameters} \\ \hline
\textbf{sfrd} & 15 & 5 & 4 & 3 & ... & 0 \\ \hline
\textbf{b1d} & 0 & -26374 & -24822 & -17453 & ... & 31416 \\ \hline
\textbf{a0d} & -32767 & -32483 & -32201 & -31921 & ... & -23934 \\ \hline
\textbf{b0d} & 0 & 26374 & 24822 & 17453 & ... & -31416 \\ \hline
\textbf{Exp. sfrd} & 15 & 5 & 4 & 3 & ... & 0 \\ \hline
\textbf{Exp. b1d} & 0 & -26374 & -24822 & -17453 & ... & 31416 \\ \hline
\textbf{Exp. a0d} & -32767 & -32483 & -32201 & -31921 & ... & -23934 \\ \hline
\textbf{Exp. b0d} & 0 & 26374 & 24822 & 17453 & ... & -31416 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance sfrd & $\pm$0,0000e+00 \\ \hline
Tolerance b1d & $\pm$0,0000e+00 \\ \hline
Tolerance a0d & $\pm$0,0000e+00 \\ \hline
Tolerance b0d & $\pm$0,0000e+00 \\ \hline
\end{XtoCtabular}
\XtoCTestCase{Conversion-on-Target test}{1}
Conversion-on-Target test for Control block DLimit.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 37 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Mask parameters} \\ \hline
\textbf{Kd} & -10 & -9.444 & -8.889 & -8.333 & ... & 10 \\ \hline
\textbf{fc} & 0 & 13.889 & 27.778 & 41.667 & ... & 500 \\ \hline
\textbf{ts\_fact} & 1 & 1 & 1 & 1 & ... & 1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Controller parameters} \\ \hline
\textbf{sfrd} & 15 & 5 & 4 & 3 & ... & 0 \\ \hline
\textbf{b1d} & 0 & -26373 & -24822 & -17453 & ... & 31415 \\ \hline
\textbf{a0d} & -32767 & -32483 & -32201 & -31921 & ... & -23933 \\ \hline
\textbf{b0d} & 0 & 26373 & 24822 & 17453 & ... & -31415 \\ \hline
\textbf{Exp. sfrd} & 15 & 5 & 4 & 3 & ... & 0 \\ \hline
\textbf{Exp. b1d} & 0 & -26374 & -24822 & -17453 & ... & 31416 \\ \hline
\textbf{Exp. a0d} & -32767 & -32483 & -32201 & -31921 & ... & -23934 \\ \hline
\textbf{Exp. b0d} & 0 & 26374 & 24822 & 17453 & ... & -31416 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance sfrd & $\pm$0,0000e+00 \\ \hline
Tolerance b1d & $\pm$1,0000e+00 \\ \hline
Tolerance a0d & $\pm$1,0000e+00 \\ \hline
Tolerance b0d & $\pm$1,0000e+00 \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 1688 \\ \hline
Max CPU cycles & 5799 \\ \hline
Avg CPU cycles & 5201 \\ \hline
\end{XtoCtabular}
