\XtoCVerification{PLimit FiP16 CPU STM32F072RB}
\begin{tabular}{l l}
\textbf{Date of Test} & 2026-06-19 \\
\textbf{Target controller} & STM32F072RB \\
\end{tabular}
\vspace{1ex}
\XtoCTestCase{Inport test}{1}
Inport test for Control block PLimit.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 201 \\ \hline
\textbf{CPU cycles} & 52 & 52 & 52 & 82 & ... & 82 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Inputs} \\ \hline
\textbf{In (DSP)} & 0 & 0 & 0 & 0 & ... & 0 \\ \hline
\textbf{max (DSP)} & 26214 & 26214 & 26214 & 26214 & ... & 26214 \\ \hline
\textbf{min (DSP)} & 4915 & 4915 & 4915 & 4915 & ... & 4915 \\ \hline
\textbf{Enable (DSP)} & 0 & 0 & 0 & 1 & ... & 1 \\ \hline
\textbf{In} & 0 & 0 & 0 & 0 & ... & 0 \\ \hline
\textbf{max} & 0.8 & 0.8 & 0.8 & 0.8 & ... & 0.8 \\ \hline
\textbf{min} & 0.15 & 0.15 & 0.15 & 0.15 & ... & 0.15 \\ \hline
\textbf{Enable} & 0 & 0 & 0 & 1 & ... & 1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Parameters} \\ \hline
\textbf{Kp} & \SetCell[c=6]{c}2 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Outputs} \\ \hline
\textbf{Out} & 0 & 0 & 0 & 0.15 & ... & 0.15 \\ \hline
\textbf{Exp. Out} & 0 & 0 & 0 & 0.15 & ... & 0.15 \\ \hline
\textbf{Out (DSP)} & 0 & 0 & 0 & 4915 & ... & 4915 \\ \hline
\textbf{Exp. Out (DSP)} & 0 & 0 & 0 & 4915 & ... & 4915 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance Out & $\pm$3,0518e-05 ($\pm$1 LSB) \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 52 \\ \hline
Max CPU cycles & 82 \\ \hline
Avg CPU cycles & 81 \\ \hline
\end{XtoCtabular}
\XtoCTestCase{Conversion test}{1}
Conversion test for Control block PLimit.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 37 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Mask parameters} \\ \hline
\textbf{Kp} & -11 & -10.389 & -9.778 & -9.167 & ... & 11 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Controller parameters} \\ \hline
\textbf{sfrb1} & 11 & 11 & 11 & 11 & ... & 11 \\ \hline
\textbf{b1} & -22528 & -21276 & -20025 & -18773 & ... & 22528 \\ \hline
\textbf{Exp. sfrb1} & 11 & 11 & 11 & 11 & ... & 11 \\ \hline
\textbf{Exp. b1} & -22528 & -21276 & -20025 & -18773 & ... & 22528 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance sfrb1 & $\pm$0,0000e+00 \\ \hline
Tolerance b1 & $\pm$0,0000e+00 \\ \hline
\end{XtoCtabular}
\XtoCTestCase{Conversion-on-Target test}{1}
Conversion-on-Target test for Control block PLimit.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 37 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Mask parameters} \\ \hline
\textbf{Kp} & -11 & -10.389 & -9.778 & -9.167 & ... & 11 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Controller parameters} \\ \hline
\textbf{sfrb1} & 11 & 11 & 11 & 11 & ... & 11 \\ \hline
\textbf{b1} & -22528 & -21276 & -20024 & -18773 & ... & 22528 \\ \hline
\textbf{Exp. sfrb1} & 11 & 11 & 11 & 11 & ... & 11 \\ \hline
\textbf{Exp. b1} & -22528 & -21276 & -20025 & -18773 & ... & 22528 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance sfrb1 & $\pm$0,0000e+00 \\ \hline
Tolerance b1 & $\pm$1,0000e+00 \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 1640 \\ \hline
Max CPU cycles & 4611 \\ \hline
Avg CPU cycles & 3683 \\ \hline
\end{XtoCtabular}
