\XtoCVerification{Limitation FiP16 CPU TMS320F28379D}
\begin{tabular}{l l}
\textbf{Date of Test} & 2026-06-22 \\
\textbf{Target controller} & TMS320F28379D \\
\end{tabular}
\vspace{1ex}
\XtoCTestCase{Inport test}{1}
Inport test for General block Limitation.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 159 \\ \hline
\textbf{CPU cycles} & 52 & 52 & 52 & 52 & ... & 52 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Inputs} \\ \hline
\textbf{In (DSP)} & -32768 & -31508 & -30247 & -28987 & ... & 19661 \\ \hline
\textbf{max (DSP)} & 9830 & 9830 & 9830 & 9830 & ... & 32767 \\ \hline
\textbf{min (DSP)} & -13107 & -13107 & -13107 & -13107 & ... & -32768 \\ \hline
\textbf{In} & -1 & -0.962 & -0.923 & -0.885 & ... & 0.6 \\ \hline
\textbf{max} & 0.3 & 0.3 & 0.3 & 0.3 & ... & 1 \\ \hline
\textbf{min} & -0.4 & -0.4 & -0.4 & -0.4 & ... & -1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Outputs} \\ \hline
\textbf{Out} & -0.4 & -0.4 & -0.4 & -0.4 & ... & 0.6 \\ \hline
\textbf{Exp. Out} & -0.4 & -0.4 & -0.4 & -0.4 & ... & 0.6 \\ \hline
\textbf{Out (DSP)} & -13107 & -13107 & -13107 & -13107 & ... & 19661 \\ \hline
\textbf{Exp. Out (DSP)} & -13107 & -13107 & -13107 & -13107 & ... & 19661 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance Out & $\pm$3,0518e-05 ($\pm$1 LSB) \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 52 \\ \hline
Max CPU cycles & 56 \\ \hline
Avg CPU cycles & 54 \\ \hline
\end{XtoCtabular}
