\XtoCVerification{Sin FiP16 CPU TMS320F28379D}
\begin{tabular}{l l}
\textbf{Date of Test} & 2026-06-22 \\
\textbf{Target controller} & TMS320F28379D \\
\end{tabular}
\vspace{1ex}
\XtoCTestCase{Inport test}{1}
Inport test for Math block Sin.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 133 \\ \hline
\textbf{CPU cycles} & 64 & 67 & 64 & 64 & ... & 64 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Inputs} \\ \hline
\textbf{In (DSP)} & -32768 & -32272 & -31775 & -31279 & ... & 32767 \\ \hline
\textbf{In} & -1 & -0.985 & -0.97 & -0.955 & ... & 1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Outputs} \\ \hline
\textbf{Out} & 0 & -0.048 & -0.095 & -0.142 & ... & 0 \\ \hline
\textbf{Exp. Out} & -0 & -0.048 & -0.095 & -0.142 & ... & 0 \\ \hline
\textbf{Out (DSP)} & 0 & -1558 & -3115 & -4662 & ... & 3 \\ \hline
\textbf{Exp. Out (DSP)} & 0 & -1559 & -3115 & -4663 & ... & 0 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance Out & $\pm$1,2207e-04 ($\pm$4 LSB) \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 64 \\ \hline
Max CPU cycles & 67 \\ \hline
Avg CPU cycles & 64 \\ \hline
\end{XtoCtabular}
