\XtoCVerification{PT1 FiP16 CPU STM32F072RB}
\begin{tabular}{l l}
\textbf{Date of Test} & 2026-06-19 \\
\textbf{Target controller} & STM32F072RB \\
\end{tabular}
\vspace{1ex}
\XtoCTestCase{Inport test}{1}
Inport test for Control block PT1.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 105 \\ \hline
\textbf{CPU cycles} & 96 & 96 & 96 & 96 & ... & 96 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Inputs} \\ \hline
\textbf{In (DSP)} & 0 & 0 & 0 & 0 & ... & -9830 \\ \hline
\textbf{In} & 0 & 0 & 0 & 0 & ... & -0.3 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Parameters} \\ \hline
\textbf{V} & \SetCell[c=6]{c}1.1 \\ \hline
\textbf{fc} & \SetCell[c=6]{c}230 \\ \hline
\textbf{ts\_fact} & \SetCell[c=6]{c}1 \\ \hline
\textbf{method} & \SetCell[c=6]{c}zoh \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Outputs} \\ \hline
\textbf{Out} & 0 & 0 & 0 & 0 & ... & -0.329 \\ \hline
\textbf{Exp. Out} & 0 & 0 & 0 & 0 & ... & -0.329 \\ \hline
\textbf{Out (DSP)} & 0 & 0 & 0 & 0 & ... & -10776 \\ \hline
\textbf{Exp. Out (DSP)} & 0 & 0 & 0 & 0 & ... & -10780 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance Out & $\pm$1,5259e-04 ($\pm$5 LSB) \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 96 \\ \hline
Max CPU cycles & 96 \\ \hline
Avg CPU cycles & 96 \\ \hline
\end{XtoCtabular}
