\XtoCVerification{Sign FiP16 CPU TM4C123GH6}
\begin{tabular}{l l}
\textbf{Date of Test} & 2026-06-19 \\
\textbf{Target controller} & TM4C123GH6 \\
\end{tabular}
\vspace{1ex}
\XtoCTestCase{Inport test}{1}
Inport test for Math block Sign.

\vspace{1em}
\begin{tblr}{width=\textwidth, colspec={|c|c|c|c|c|X[c]|c|}}
\hline
\SetRow{lightgray} \SetCell[c=7]{l} \textbf{Test results} \\ \hline
\textbf{Time step} & 1 & 2 & 3 & 4 & ... & 37 \\ \hline
\textbf{CPU cycles} & 33 & 33 & 33 & 33 & ... & 29 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Inputs} \\ \hline
\textbf{In (DSP)} & -32768 & -30948 & -29127 & -27307 & ... & 32767 \\ \hline
\textbf{In} & -1 & -0.944 & -0.889 & -0.833 & ... & 1 \\ \hline
\SetRow{lightgray!50} \SetCell[c=7]{l} \textit{Outputs} \\ \hline
\textbf{Out} & -1 & -1 & -1 & -1 & ... & 1 \\ \hline
\textbf{Exp. Out} & -1 & -1 & -1 & -1 & ... & 1 \\ \hline
\textbf{Out (DSP)} & -32767 & -32767 & -32767 & -32767 & ... & 32767 \\ \hline
\textbf{Exp. Out (DSP)} & -32768 & -32768 & -32768 & -32768 & ... & 32767 \\ \hline
\end{tblr}
\vspace{1ex}

\begin{XtoCtabular}{Test settings}
Tolerance Out & $\pm$3,0518e-05 ($\pm$1 LSB) \\ \hline
\end{XtoCtabular}

\begin{XtoCtabular}{Test statistics}
Min CPU cycles & 29 \\ \hline
Max CPU cycles & 33 \\ \hline
Avg CPU cycles & 30 \\ \hline
\end{XtoCtabular}
